ARMlite Bitwise Masks and Logical Shifts

AND keeps a source bit where the mask has 1 and clears it where the mask has 0. ORR sets bits where the mask has 1 while preserving the other positions. EOR toggles positions selected by mask 1 and leaves positions selected by mask 0 unchanged. These are operations on bit patterns, not Boolean and/or tests of whether a whole register is nonzero.

For source 0b10110101, AND with 0b00001111 selects its low four bits, yielding 0b0101=5. ORR of that result with 0b10000000 sets bit 7, giving 0b10000101=133. EOR of the original with 0b11111111 toggles its low eight bits, giving 0b01001010=74 while any unselected higher bits remain unchanged.

LSL moves the register’s bits left, inserts zeroes at the right and discards bits shifted beyond the 32-bit boundary. LSR moves them right and inserts zeroes at the left. For R1=5, LSL by two gives 20 because no significant 1 is lost. For unsigned R0=181, LSR by three gives 22, discarding the remainder bits.

An unsigned left shift corresponds to multiplication by a power of two only when the fixed-width result does not lose required high bits. An unsigned logical right shift corresponds to integer division by a power of two with the low remainder discarded. A signed negative pattern needs more care: a logical right shift does not preserve its sign as an arithmetic right shift would. State the interpretation before making an arithmetic claim.

MVN writes a bitwise complement into the destination. ARMlite registers contain 32 bits, so complementing 5 gives pattern 0xFFFFFFFA, which is unsigned 4294967290 or signed two’s-complement −6. It is not merely the eight-bit complement 250 unless an additional eight-bit mask explicitly discards the upper bits. A display of the lowest byte does not change the register width.

The program keeps intermediate results in separate registers so they can be checked independently. Write each selected mask and source in aligned binary columns, then convert only after the bitwise step. Test mask zero, all low bits set and a source with a 1 beyond the displayed low byte. This checks whether an apparent short-binary answer has silently discarded significant machine state.

MOV R0, #0b10110101
AND R1, R0, #0b00001111
ORR R2, R1, #0b10000000
EOR R3, R0, #0b11111111
LSL R4, R1, #2
LSR R5, R0, #3
MVN R6, R1
HALT

Attempt the task before opening its worked response. Record each change of state, explain the rule used, and check the result against the original requirements. Code examples labelled Python 3 use that language’s conventions; pseudocode states its own assumptions.