Immediate, Direct, Indirect and Indexed Addressing

In immediate addressing, the operand supplies a literal value used by the instruction. In direct addressing, it supplies the memory address containing the required value. Under an explicitly defined notation, LOAD #20 can mean load the constant 20, while LOAD 20 can mean read memory location 20. These symbols are illustrative, not universal assembly syntax.

For this lesson, let memory[20]=80 and memory[80]=7. An immediate load of 20 gives 20; a direct load from 20 gives 80. State which part is the instruction operand, the effective address and the data value. The same numerical operand can produce a different result depending on the specified mode.

With indirect addressing, the operand identifies a location holding another address. The processor obtains that address, then accesses the value there. Using the example memory, indirect addressing through location 20 follows 20→80→7, so the loaded value is 7. The intermediate 80 is an address, not the final data in this operation.

This supports pointers and structures whose data locations change without rewriting every instruction. It can involve extra memory accesses compared with direct addressing in a simple model. Real machines may use register-indirect or combined modes, but an exam trace should follow the exact convention provided rather than add an unmentioned register or level of indirection.

Indexed addressing forms an effective address from a base operand plus an index register, under the model stated. With base 20 and index 3, the effective address is 23, so a load reads memory[23]. This is not the same as adding 3 to the value stored at address 20.

Indexed addressing supports stepping through arrays by changing the index while retaining a base. If each element occupies several addressable units, the offset may need scaling by element size; some architectures scale automatically and others do not. Our examples use one unit per element. OCR LMC’s small instruction set mainly uses direct mailbox operands and branches; it does not supply all four modes merely because general assembly languages can.

Attempt the task before opening its worked response. Record each change of state, explain the rule used, and check the result against the original requirements. Code examples labelled Python 3 use that language’s conventions; pseudocode states its own assumptions.