4.7.3.3, 4.7.3.4, 4.7.3.5Organisation and ArchitectureCore

Assembly Instructions and Addressing Modes

An instruction’s meaning comes from its processor-specific definition. Interpret the supplied mnemonic, operand and addressing mode before tracing changes to registers or memory.

35 min Processor and Memory

What you'll be able to do

Apply immediate and direct addressing
Trace load, arithmetic, store, compare and branch operations
Use bitwise logic and logical shifts under stated widths

Read the instruction format

An instruction set defines the available operations and their encodings. An instruction contains operation information and any operand fields needed by that model. AQA questions supply the context for interpreting opcodes; an invented universal bit pattern for ADD would be inappropriate.

An operand may be a value, memory address or register identifier. In a simple model, bits allocated to the opcode can also distinguish addressing modes. The field width limits the number of possible encodings, not necessarily the number of operations with completely different basic meanings.

Distinguish immediate and direct values

Immediate addressing uses the operand itself as the data value. Direct addressing uses the operand to identify the location of the data. If memory[40]=7, LOAD #40 in the illustrative notation loads 40, while LOAD 40 loads 7. The # notation is a convention defined for this lesson.

A store changes a destination location, while a load changes the destination register or accumulator. A comparison can update flags without replacing the compared values. Conditional branches consult the defined condition; an unconditional branch changes flow regardless of those flags.

Trace only the specified machine

Arithmetic, bitwise AND/OR/NOT/XOR, logical shifts and halt all depend on the stated widths and instruction semantics. A logical right shift inserts a zero rather than automatically preserving a negative sign. Record the PC or instruction label when following a branch.

Use a register/memory trace table and test the stop condition. Mnemonics can differ between machines, and a sequence of valid-looking instructions is not meaningful without its definitions. Check the mathematical result and any overflow assumptions after tracing the actual machine operations.

Illustrative assembly

LOAD #5
ADD 40
STORE 41
HALT

Initial MEMORY[40] = 7

Scroll horizontally to see the full code or table.

Toy accumulator machine: # marks immediate data; an unmarked operand is a direct address.

Work through the problem

Attempt the task before opening its worked response. Record each change of state, explain the rule used, and check the result against the original requirements. Code examples labelled Python 3 use that language’s conventions; pseudocode states its own assumptions.

Example 1Trace the toy program and find memory[41].

1LOAD #5 sets the accumulator to 5.

2ADD 40 reads 7 from memory and produces 12; STORE writes 12 at 41.

Answermemory[41]=12.

Example 2An opcode/mode field has five bits. How many distinct field patterns exist?

1Each bit has two possibilities.

22⁵=32 encodings.

Answer32 patterns; their assigned meanings depend on the instruction set.

Common mistakes to avoid

Treating a direct address as the value to add.

Dereference it under the supplied mode.

Assuming familiar mnemonic spelling guarantees familiar semantics.

Read the question’s instruction definitions.

Key takeaways

Instruction fields have model-specific meanings.
Immediate data and direct addresses differ.
A complete trace follows registers, memory and control flow.

Test yourself

Answer a few questions, then review anything you missed.

Next step

Keep practising

Start with the quiz above to check the key ideas. You can also choose another topic from the practice library.

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