Loading...
The fetch–decode–execute cycle moves an instruction through several distinct registers. Trace the role of each register rather than treating them as interchangeable memory boxes.
What you'll be able to do
The control unit coordinates instruction processing and control signals. The arithmetic logic unit performs arithmetic and logical operations. A clock coordinates timed activity, while general-purpose registers hold values for rapid use. A status register contains relevant flags such as zero or carry under the instruction-set model.
Dedicated registers have specific roles: the program counter identifies the next instruction, the memory address register selects a memory location, the memory buffer/data register holds a transferred value, and the current instruction register holds the instruction being decoded or executed.
In a word-addressed model with one word per instruction, copy PC to MAR and initiate a memory read. The fetched word arrives through the memory buffer register and is placed in the current instruction register. The PC advances to the following instruction location, ready unless control flow changes it.
Exact timing can overlap and real instruction sizes vary, so a PC increment of one applies to the stated educational model rather than every processor. The important distinction is that fetching uses an address to obtain an instruction, then decoding interprets that instruction’s operation and operands.
The control unit interprets the instruction according to the processor’s instruction set. Execution may involve register arithmetic, another memory access, a comparison or a branch that changes the PC. Status flags can record properties needed by later conditional instructions.
Do not assume every fetched operand is already the final data: an addressing mode can say that it identifies a location containing the data. A trace should record the register values and memory changes specified in the question. Separate the conceptual cycle from claims that every instruction takes exactly one clock tick.
MAR ← PC
MBR ← MEMORY[MAR]
CIR ← MBR
PC ← PC + 1
DECODE CIR
EXECUTE CIRScroll horizontally to see the full code or table.Attempt the task before opening its worked response. Record each change of state, explain the rule used, and check the result against the original requirements. Code examples labelled Python 3 use that language’s conventions; pseudocode states its own assumptions.
Common mistakes to avoid
Key takeaways
Test yourself
Answer a few questions, then review anything you missed.
Start with the quiz above to check the key ideas. You can also choose another topic from the practice library.