Sampling, Quantisation and ADC/DAC

An analogue signal varies continuously in the model. Sampling measures it at discrete instants. A sample rate of 200 samples per second means a 0.005-second interval, not that amplitudes can take only 200 different values. Quantisation maps each sampled amplitude to one of a finite set of levels. Encoding represents the selected level as a binary code.

An n-bit converter has 2ⁿ possible codes. Increasing bit depth can reduce amplitude quantisation error for the same input range, while increasing sample rate gives more frequent time measurements. Neither can recover information that the other has already discarded. For a band-limited signal, sampling above twice its highest frequency avoids aliasing under the ideal sampling assumptions; real acquisition systems also need appropriate filtering.

Consider a teaching ADC with input range 0≤V<4 volts, three-bit output, eight equal bins and code floor(V/0.5). Each bin is 4/8=0.5 V wide. An input of 2.3 V belongs in [2.0,2.5), so its code is 4, or 100₂. The exact upper endpoint and out-of-range behaviour must be specified; this example rejects 4 V rather than silently creating an impossible three-bit code 8.

Other converter models map endpoint voltages to endpoint codes and may use a different step convention, such as range divided by 2ⁿ−1. Read the given mapping instead of mixing formulas. Under this lesson’s bin model, reconstructing a sample at the bin midpoint gives a maximum magnitude of quantisation error of half a bin width for valid inputs. This is a model assumption, not a universal claim about every real ADC.

A mono stream with 200 samples per second and twelve bits per sample generates 2400 raw data bits per second. Ten seconds gives 24,000 bits, or 3000 bytes before headers, timestamps, alignment or compression. State whether units are bits or bytes; sample rate multiplied by bit depth does not directly give a byte count. More channels multiply the raw rate again.

An ADC converts an analogue input into a digital representation. A DAC converts a digital code to an analogue output level, often followed by filtering or a power stage. A digital control output may instead drive a switch or use pulse-width modulation; not every actuator requires a separate DAC. In an embedded-system diagram, place conversion where the actual signal type changes and label the interfaces.

Attempt the task before opening its worked response. Record each change of state, explain the rule used, and check the result against the original requirements. Code examples labelled Python 3 use that language’s conventions; pseudocode states its own assumptions.